NetLogic Microsystems has introduced a multi-core processor designed to handle multiple simultaneous packet-handling processes in network equipment.

Created for use in switchers, routers, gateways and other network systems, the new chip can simultaneously control deep packet content inspection, application-aware switching and routing, intrusion prevention system (IPS), anti-virus/malware, network service management, packet ordering, parsing, IPv6/IPv4 forwarding, classification, IPSec/SSL encryption, ACL security, compression/decompression and quality of service – in networks operating at up to 40 Gbps.

NetLogic's new chip – the NLX321103A – combines multi-core processing and knowledge-based processing technologies.

Competitive solutions provide non-deterministic, high-latency and best-effort packet processing, which forces networking original equipment manufacturers (OEMs) to separate Layers 2-4 and Layers 4-7 processing on different cards and then selectively perform certain functions only on a fraction of the traffic, NetLogic explained.

NetLogic Microsystems' 40 Gbps NLX321103A solution enables switches, routers, access aggregation, metro Ethernet, service gateways, security appliances and storage appliances to perform L2-L7 packet processing on every packet of traffic with minimal network latency.

"Our new L2-L7 NLX321103A solution is a game changer for the industry as it provides customers with the unprecedented ability to develop a new class of highly differentiated networking systems that deliver deterministic line-rate throughput while supporting L2-L7 functionality," said Chris O'Reilly, vice president of marketing at NetLogic.

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